fpga-fast-validation-kit is a practical fast-simulation layer for FPGA RTL workflows and AI agents. The goal is to catch more RTL issues before entering heavier Vivado or xsim flows, shorten ...
A clean, verified hardware implementation of AES-PRF, the dedicated pseudorandom function built from AES by Bart Mennink and Samuel Neves, "Optimal PRFs from Blockcipher Designs" (IACR Trans.
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